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 RF2609
10
Typical Applications * CDMA/FM Cellular Systems * Supports Dual-Mode AMPS/CDMA * Supports Dual-Mode TACS/CDMA * General Purpose Linear IF Amplifier * Portable Battery Powered Equipment * Commercial and Consumer Systems
CDMA/FM TRANSMIT AGC AMPLIFIER
N du E ct W
F2
The RF2609 is a complete AGC amplifier designed for the transmit section of dual-mode CDMA/FM cellular applications. It is designed to amplify IF signals while providing more than 84dB of gain control range. Noise Figure, IP3, and other specifications are designed to be compatible with the IS-95 Interim Standard for CDMA cellular communications. This circuit is designed as part of the RFMD CDMA Chip Set, consisting of this Transmit IF AGC Amp, a Transmit Upconverter, a Receive LNA/Mixer, and a Receive IF AGC Amp. The IC is manufactured on an advanced high frequency Silicon Bipolar process and is packaged in a standard miniature 16-lead plastic SSOP package.
D 61 ES 9 & IG R F2 N 62 S
.157 .150 .009
1
Product Description
9
.010 .004 .012 .008 .069 .053
.196 .189
.025
.244 .228
8MAX 0MIN
R
.050 .016
.010 .008
Optimum Technology Matching(R) Applied
Si Bi-CMOS
SiGe HBT
Si CMOS
FO ra de R d
ro
* Supports Dual Mode Operation * -48dB to +42dB Gain Control Range * IS-95 CDMA Compatible * Monolithic Construction * 12MHz to 175MHz Operation * Miniature Surface Mount Package
CDMA+ 1 CDMA- 2 GND 3 GND 4 GND 5 GND 6 GND 7 NC 8
GAIN CONTROL
N S ee O T U
pg
P
1 6 GC 1 5 VCC 1 4 VCC 1 3 VCC 1 2 GND 1 1 GND 1 0 OUT+ 9 OUT-
Ordering Information
RF2609 RF2609 PCBA CDMA/FM Transmit AGC Amplifier Fully Assembled Evaluation Board
Functional Block Diagram
RF Micro Devices, Inc. 7625 Thorndike Road Greensboro, NC 27409, USA
Tel (336) 664 1233 Fax (336) 664 0454 http://www.rfmd.com
Rev B3 000822
10-9
IF AMPLIERS
!Si BJT
Package Style: SSOP-16
GaAs HBT
GaAs MESFET
s
10
Features
RF2609
Absolute Maximum Ratings Parameter
Supply Voltage Control Voltage Input Power Levels Operating Ambient Temperature Storage Temperature
Rating
-0.5 to +7.0 -0.5 to +5.0 +10 -40 to +85 -40 to +150
Unit
VDC V dBm C C Caution! ESD sensitive device.
RF Micro Devices believes the furnished information is correct and accurate at the time of this printing. However, RF Micro Devices reserves the right to make changes to its products without notice. RF Micro Devices does not assume responsibility for the use of the described product(s).
Parameter
Specification Min. Typ. Max.
Unit
Condition
T=25C, 130MHz, VCC =3.6V, ZS =1k, ZL =1k, 1k External Output Terminating Resistor (Effective ZL =500) (See Application Example)
Overall
Frequency Range Maximum Gain Minimum Gain Gain Slope Gain Control Voltage Range Gain Control Input Impedance Noise Figure Input IP3 Input Impedance Stability (Max VSWR) 12 to 175 +42 -48 47 0 to 3 30 10 -25 1
+39
-26 10:1
25
F2
IF AMPLIERS
N S ee O T U
10-10
pg
FO ra de R d
P
ro
R
10
Voltage Current Consumption Current Consumption
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3.3 to 3.6 23 22
Power Supply
D 61 E S 9 IG & R F2 N 62 S 9
-45 MHz dB dB dB/V VDC k dB dBm k V mA mA Maximum gain Minimum gain
VGC =2.76V VGC =0.2V Measured in 0.5V increments
At maximum gain and 130MHz At +10 gain and referenced to 1k Differential Spurious<-70dBm
Rev B3 000822
RF2609
Pin 1 Function CDMA+ Description
CDMA Balanced Input Pin. This pin is internally DC biased and should be DC blocked if connected to a device with a DC level, other than VCC, present. A DC to connection to VCC is acceptable. For single-ended input operation, one pin is used as an input and the other CDMA input is AC coupled to ground. The balanced input impedance is 1k, while the single-ended input impedance is 500. Same as pin 2, except complementary input. Ground connection. Keep traces physically short and connect immediately to ground plane for best performance. Same as pin 3. Same as pin 3. Same as pin 3. Same as pin 3.
Interface Schematic
VCC
580 CDMA+
580 CDMA-
2 3 4 5 6 7 8 9
CDMAGND GND GND GND GND NC OUT-
See pin 1 schematic.
No Connection pin. This pin is internally biased and should not be connected to any external circuitry, including ground or VCC.
Same as pin 3.
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14 15 16
VCC VCC GC
Same as pin 13.
P
Analog gain adjustment for all amplifiers. Valid control ranges are from 0V to 3.0V. Maximum gain is selected with 3.0V. Minimum gain is selected with 0V. These voltages are valid only for a 3.3k DC source impedance.
VCC
ro
12.7 k 23.5 k 15 k
N S ee O T U
Rev B3 000822
pg
10-11
IF AMPLIERS
Supply Voltage pin. External bypassing is required. The trace length between the pin and the bypass capacitors should be minimized. The ground side of the bypass capacitors should connect immediately to ground plane. Pins 13, 14, and 15 may share one bypass capacitor if trace lengths are kept minimal. Same as pin 13.
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F2
10 11 12 13
OUT+ GND GND VCC
Balanced Output pin. This is an open-collector output, designed to operate into a 500 balanced load. The load sets the operating impedOUT+ OUTance, but an external choke or matching inductor to VCC must also be supplied in order to correctly bias this output. This bias inductor is typically incorporated in the matching network between the output and next stage. Because this pin is biased to VCC, a DC blocking capacitor must be used if the next stage's input has a DC path to ground. Same as pin 9, except complementary output. See pin 9 schematic. Same as pin 3.
D 61 E S 9 IG & R F2 N 62 S 9
R
10
RF2609
Application Schematic
Measurement Reference Plane ZS=1 k IN+ 10 nF INZIN=1 k 2 3 4 5 6 7 8
10 nF 1 GAIN CONTROL 16 15
3.3 k GAIN
10 nF 14 10 nF
D 61 E S 9 IG & R F2 N 62 S 9
13 12 11 10 9 VCC C1 L1 C2 CDMA Filter R2: 1 k C2 C1 L1 ZOUT=1 k VCC 10 nF
ZLOAD=1 k
OUT+ OUT-
ZLOAD,EFF =500 R2 sets the balanced output impedance to 1 k. L1 and C2 serve dual purposes. L1 serves as an output bias choke, and C2 serves as a series DC block. In addition, the values of L1 and C2 may be chosen to form an impedance matching network if the load impedance is not 1k. Otherwise, the values of L1 and C1 are chosen to form a parallel-resonant tank circuit at the IF when the IF filter's input impedance is 1 k.
Measurement Reference Plane
IF AMPLIERS
N S ee O T U
10-12
pg
FO ra de R d
P
ro
R
10
N du E W ct s
F2
Rev B3 000822
RF2609
Evaluation Board Schematic
(Download Bill of Materials from www.rfmd.com.)
CDMA 50 strip T1 C1 5.1 pF C3 0.01 F 1 2 C2 5.1 pF L2 270 nH C4 0.01 F L1 270 nH 3 4 5 P1 P1-1 1 2 P1-3 3 VCC GND GC 8 6 7 GAIN CONTROL 16 15 14 13 12 C10 0.01 F C11 0.01 F C12 0.01 F R1 3.3 k P1-3
SMA J1
P1-1
D 61 E S 9 IG & R F2 N 62 S 9
11 10 9 L4 100 nH C9 20 pF T2 WB3040 R2 1k C8 36 pF C5 36 pF L3 100 nH C7 20 pF 2609400A C6 0.01 F
OUT 50 strip SMA J2
P1-1
N du E W ct s
F2
R
10
IF AMPLIERS
N S ee O T U
Rev B3 000822
pg
FO ra de R d
P
ro
10-13
10
IF AMPLIERS
10-14
RF2609
N S ee O T U FO ra de R d
P R ro F2
pg
N du E W ct s D 61 E S 9 IG & R F2 N 62 S 9
Evaluation Board Layout
Rev B3 000822
RF2609
RF2609 Gain vs. Gain Control Voltage (Vcc=3.6 V, 130 MHz)
60 50 40 30 20 +25C
10 20 -30 C +25 C +85 C -10
RF2609 OIP3 vs. Gain (Vcc=3.6 V, 130 MHz)
-30C
0
+80C
Gain (dB)
10 0 -10 -20 -30 -40 -50 -60 0.0 0.5 1.0 1.5 2.0 2.5
OIP3 (dB)
-20 -30 -40
D 61 E S 9 IG & R F2 N 62 S 9
-50 -60 -70
3.0
-60.0
-40.0
-20.0
0.0
20.0
40.0
60.0
GC (volts)
Gain (dB)
10
RF2609 IIP3 vs. Gain (Vcc=3.6 V, 130 MHz)
RF2609 Noise Figure vs. Gain (Vcc=3.6 V, 130 MHz)
80
-30 C 0 +25 C +80 C
70
60
-10
Noise Figure (dB)
-20
N du E W ct s
50
IIP3 (dB)
F2
40
R
-30
30
10
IF AMPLIERS
20
-40
10
-50 -60.0
FO ra de R d
0 -60 -40 -20 0 20 40 60
-40.0
-20.0
0.0
20.0
40.0
60.0
60 50 40 30 20 10 0
RF2609 Gain vs. Gain Control Voltage (Vcc=3.3 V, 130 MHz)
20 10 0 85 C -10 -30 C +25 C -30 C
P
ro
Gain (dB)
Gain (dB)
RF2609 OIP3 vs. Gain (Vcc=3.3 V, 130 MHz)
N S ee O T U
+25 C +85 C
pg
OIP3 (dB)
1.5 2.0 2.5 3.0
Gain (dB)
-20 -30 -40 -50 -60 -70
-10 -20 -30 -40 -50 -60
0.0
0.5
1.0
-60.0
-40.0
-20.0
0.0
20.0
40.0
60.0
GC (volts)
Gain (dB)
Rev B3 000822
10-15
RF2609
RF2609 IIP3 vs. Gain (Vcc=3.3 V, 130 MHz)
10 -30 C 0 +25 C -10 +85 C
IIP3 (dB)
-20
-30
-40
-50 -60.0 -40.0 -20.0 0.0 20.0 40.0 60.0
Gain (dB)
IF AMPLIERS
N S ee O T U
10-16
pg
FO ra de R d
P
ro
R
10
N du E W ct s
F2
D 61 E S 9 IG & R F2 N 62 S 9
Rev B3 000822


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